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digitalclock
- 这是一个数字钟的VHDL实现.采用八段数码管显示！ --可调闹铃，可校时。
shuzizhong
- 数字钟代码，用VHDL语言设计一个数字钟系统，该系统具有显示时、分、秒的功能，具有较时功能，具有整点报时功能。
shu_zi_zhong
- 这个程序主要介绍了数字钟用VHDL的写法，希望对大家有用
txxclock
- VHDL编写的数字钟，在Q-ii下编译，实现闹铃设置与定时闹铃，分时秒显示
shuzizhongvhdl
- 原创,基于VHDL的数字钟代码(各功能模块请自己完成)
clock_1
- 简易数字钟，使用VHDL语言编辑，简单设计，容易学习用
clock.rar
- 具有流水灯报点的数字钟实验 含有报告，用VHDL编写,Water at point of light with the number of minutes containing the report of the experiment, prepared by VHDL
Counter60min
- VHDL语言编写的一个六十进制计数器（用于分钟），一个脉冲输入引脚，一个复位引脚，8个BCD码输出引脚，一个进位输出引脚。与我的其它8个模块配套构成一个数字钟。-A 60 binary counter(for minute) programmed with VHDL language.A pulse input, a reset input, eight BCD code output BCD code, a carry bit output. It is one of my total 9 m
shizihong
- 用VHDL语言编写数字钟的程序，实现数字钟的几个功能，如计时、校时、闹钟和整点报时-Digital clock using VHDL language programs, digital clock several functions, such as timing, timing, alarm and hourly chime
EDACLOCK
- 用VHDL语言编写数字钟的程序，实现数字钟的完整功能，如计时、校时、闹钟和整点报时-Digital clock using VHDL language programs, digital clock several functions, such as timing, timing, alarm and hourly chime
shuzizhong
- 大学VHDL实验数字钟源码，有的专业数字电路实验设计也有要求做的。-University of VHDL experimental digital clock source, and some professional digital circuit design has also requested to do so.
szz
- 该文件是用VHDL变成实现的数字钟程序，请指教！-The document is a VHDL implementation of the digital clock into the procedure, please advise!
digtal
- 时、分、秒、实现数字钟的基本VHDL源代码。-Digital clock basic VHDL source code.
shi
- 数字钟的VHDL源程序，可以实现校时，校分等功能，并在试验箱上运行成功-The VHDL source code digital clock, you can achieve at school, school grade features, and success in the chamber is running on
clock
- 用VHDL开发的数字钟资料 完整的实验代码-Developed using VHDL digital clock Experimental data integrity code
shuizhongvhdl
- 这时一个数字钟的VHDL程序，有计时、校时、整点报时功能，很适合做EDA设计之用-When a digital clock in VHDL procedures, time, school hours, the whole point timekeeping function, it is suitable for use in EDA Design
shuzizhong2008
- 这时一个关于数字钟的VHDL程序，有计时、校时、报时等功能-When a digital clock on the VHDL program, there is time, school time, timer and other functions
clock
- 基于vhdl的数字钟,分别由6个数码管显示24小时、60分钟、60秒的计数显示；设有校时、校分、秒清零校正功能，分别由3个按键控制；验证可用。-On vhdl digital clock, respectively, by 6 digital tube display 24 hours, 60 minutes, 60 seconds of the count display with school hours, school hours, seconds, cleared correction
vsz
- 这是一段数字钟的VHDL程序，简单易行。具有闹钟功能 ，适用于初学者。-This is a digital clock in VHDL process, simple and easy. With the alarm clock function, for beginners.
digitalclock
- 数字钟的VHDL设计 具有整点报时、闹钟等功能 -VHDL design of digital clock the whole point timekeeping, alarm clock and other functions